The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2020
Filed:
Dec. 28, 2018
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventor:
Prasanth K, Ottapalam, IN;
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/00 (2006.01); H04L 7/00 (2006.01); H04L 7/033 (2006.01); H04L 27/00 (2006.01); H04B 1/10 (2006.01); H03K 3/012 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H04B 1/1027 (2013.01); H03K 3/012 (2013.01); H03K 19/20 (2013.01); H04L 7/0087 (2013.01); H04L 27/0002 (2013.01); H04L 7/0331 (2013.01);
Abstract
A receiver device includes an I-Q mixer circuit configured to provide an I-phase signal and a Q-phase signal. The receiver device also includes a first analog-to-digital converter (ADC) circuit configured to digitize the I-phase signal. The receiver device also includes a second ADC circuit configured to digitize the Q-phase signal. The receiver device also includes a 25% duty cycle clock generator configured to provide 25% duty cycle clock signals to the I-Q mixer. The 25% duty cycle clock generator includes a divider circuit with an inverter ring arrangement.