The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2020

Filed:

Apr. 03, 2018
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Gustavo Mehas, Mercer Island, WA (US);

Rui Liu, Fremont, CA (US);

Lijie Zhao, San Jose, CA (US);

Siqiang Fan, Foothill Ranch, CA (US);

Tae Kwang Park, San Jose, CA (US);

Zhitong Guo, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); G05F 1/10 (2006.01); H02M 1/00 (2006.01); H02M 1/32 (2007.01);
U.S. Cl.
CPC ...
H02M 3/1582 (2013.01); G05F 1/10 (2013.01); H02M 3/1584 (2013.01); H02M 3/1588 (2013.01); H02M 1/32 (2013.01); H02M 2001/0025 (2013.01);
Abstract

A power converter control circuit includes a first ramp generator connected to an input voltage and configured to produce a first ramp signal; a second ramp generator connected to the input voltage and configured to produce a second ramp signal; an error amplifier configured to produce an error amplifier output. The first ramp signal and the error amplifier output are used to produce a first (pulse width modulation) PWM signal and the second ramp signal and the error amplifier output are used to produce a second PWM signal. The first and second PWM signals control an operating state of the circuit. In some embodiments, the first ramp signal includes an extended ramp reset time. In some embodiments, the first ramp generator includes a switching device, a current source, and a capacitor.


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