The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2020

Filed:

Nov. 01, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Min Seok Jo, Suwon-si, KR;

Jae Hyun Lee, Hwaseong-si, KR;

Jong Han Lee, Namyangju-si, KR;

Hong Bae Park, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41791 (2013.01); H01L 21/762 (2013.01); H01L 21/823431 (2013.01); H01L 29/0653 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

A semiconductor device includes a first fin type pattern and a second fin type pattern, which are isolated from each other by an isolating trench, and extend in a first direction on a substrate, respectively, a third fin type pattern which is spaced apart from the first fin type pattern and the second fin type pattern in a second direction and extends in the first direction, a field insulation film on a part of sidewalls of the first to third fin type patterns, a device isolation structure, which extends in the second direction, and is in the isolating trench, a gate insulation support, which extends in the first direction on the field insulation film between the first fin type pattern and the third fin type pattern, a gate structure, which intersects the third fin type pattern, extends in the second direction, and is in contact with the gate insulation support, wherein a height from the substrate to a bottom surface of the gate structure is greater than a height from the substrate to a bottom surface of the gate insulation support.


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