The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2020

Filed:

Mar. 23, 2018
Applicants:

Fuji Electric Co., Ltd., Kawasaki, JP;

Kojin Co., Ltd., Nakaniikawa-gun, Toyama, JP;

Inventors:

Motohito Hori, Matsumoto, JP;

Yuki Inaba, Matsumoto, JP;

Yoshinari Ikeda, Matsumoto, JP;

Tetsuya Sunago, Toyama, JP;

Michihiro Inaba, Toyama, JP;

Assignees:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

KOJIN CO., LTD., Toyama, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 25/10 (2006.01); H01L 23/495 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2006.01); H01L 23/492 (2006.01); H01L 23/50 (2006.01); H01L 23/36 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5286 (2013.01); H01L 23/492 (2013.01); H01L 23/49575 (2013.01); H01L 23/50 (2013.01); H01L 25/072 (2013.01); H01L 25/10 (2013.01); H01L 25/105 (2013.01); H01L 25/18 (2013.01); H01L 23/36 (2013.01); H01L 23/49811 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01);
Abstract

A semiconductor device includes a base plate, a plurality of semiconductor units provided in parallel on the base plate, the plurality of semiconductor units implementing a pair, each semiconductor unit including a semiconductor chip and a rod-shaped unit-side control terminal, the unit-side control terminal being connected to the semiconductor chip, the unit-side control terminal extending opposite to the base plate; and an interface unit including a box-shaped accommodating portion, the accommodating portion being provided on the plurality of semiconductor units, the accommodating portion including an internal wiring and a rod-shaped external-connecting control terminal, the internal wiring being connected to each of the plurality of the unit-side control terminals extending from the plurality of semiconductor units, the external-connecting control terminal extending to the outside opposite to the semiconductor units, the external-connecting control terminal being connected to the internal wiring.


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