The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2020

Filed:

May. 30, 2018
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Miso Kim, Chilgok-gun, KR;

SungJin Park, Paju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 27/12 (2006.01); H01L 21/66 (2006.01); G09G 3/00 (2006.01); G09G 3/3208 (2016.01); G02F 1/1345 (2006.01); G02F 1/1333 (2006.01); H01L 51/00 (2006.01); G01R 31/26 (2020.01);
U.S. Cl.
CPC ...
H01L 22/34 (2013.01); G02F 1/1345 (2013.01); G02F 1/133305 (2013.01); G09G 3/006 (2013.01); G09G 3/3208 (2013.01); H01L 27/1218 (2013.01); H01L 27/3276 (2013.01); G01R 31/2635 (2013.01); G02F 2001/133388 (2013.01); G09G 2300/0426 (2013.01); H01L 22/32 (2013.01); H01L 27/124 (2013.01); H01L 51/0097 (2013.01); H01L 2251/5338 (2013.01);
Abstract

A flexible display device can include a flexible substrate including a display area including a plurality of pixels, a first non-display area extended from the display area, a bending area extended from the first non-display area, a second non-display area extended from the bending area, and a pad area extended from the second non-display area and including a plurality of pads; a plurality of data lines configured to transmit a data voltage to the plurality of pixels; a plurality of link lines extending through the first non-display area, the bending area, the second non-display area, and the pad area to connect the plurality of data lines with the plurality of pads; and a plurality of inspection transistors arranged in the pad area, each of the plurality of inspection transistors including a first electrode connected to one of the plurality of link lines.


Find Patent Forward Citations

Loading…