The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10630915 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 21, 2020

Filed:

Jun. 12, 2018
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventor:

Hiroaki Niitsuma, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/225 (2006.01); H04N 5/335 (2011.01); H04N 1/00 (2006.01); H04N 5/369 (2011.01);
U.S. Cl.
CPC ...
H04N 5/3355 (2013.01); H04N 1/00885 (2013.01); H04N 1/00888 (2013.01); H04N 1/00891 (2013.01); H04N 5/369 (2013.01);
Abstract

The image forming apparatus of the present invention is a semiconductor integrated circuit including: a first image processing module; a second image processing module; a first SRAM configured to temporarily store image data for which the first image processing has been performed by the first image processing module; a second SRAM configured to store a parameter for performing the second image processing for image data that is input to the second image processing module; and a control unit. The control unit stops power supply to the first SRAM, continues to supply power to a storage area of the second SRAM in which the parameter is stored, and stops power supply to a control area for writing data to the storage area of the second SRAM based on that a condition to cause the semiconductor integrated circuit to make a transition into a power-saving mode is satisfied.


Find Patent Forward Citations

Niitsuma, Hiroaki. (2020). Semiconductor integrated circuit that can turn off part of a write area without turning off a memory area and control method of semiconductor integrated circuit (U.S. Patent No. 10630915). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10630915

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