The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Dec. 18, 2018
Applicant:

Artery Technology Co., Ltd., Chongqing, CN;

Inventors:

Baotian Hao, Chongqing, CN;

Chao Li, Chongqing, CN;

Weitie Wang, Chongqing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 1/02 (2006.01); H03B 5/04 (2006.01); G05F 3/20 (2006.01); H03K 3/03 (2006.01); G05F 1/10 (2006.01); H03K 3/011 (2006.01);
U.S. Cl.
CPC ...
H03L 1/023 (2013.01); G05F 1/10 (2013.01); G05F 3/20 (2013.01); H03B 5/04 (2013.01); H03K 3/011 (2013.01); H03K 3/0315 (2013.01);
Abstract

The present invention provides an oscillator circuit and associated oscillator device. The oscillator circuit comprises a negative-temperature-coefficient (NTC) bias current generating circuit and a set of oscillator sub-block circuits. The NTC bias current generating circuit is coupled between a supply voltage and a ground voltage, and is arranged to generate at least one NTC bias current. The set of oscillator sub-block circuits are coupled to each other to form an oscillator. Each oscillator sub-block circuit of the set of oscillator sub-block circuits comprises a plurality of transistors coupled between the supply voltage and a node within the NTC bias current generating circuit, wherein the NTC bias current generating circuit and the aforementioned each oscillator sub-block circuit share at least one transistor in the plurality of transistors.


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