The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Apr. 24, 2019
Applicant:

Realtek Semiconductor Corp., Hsinchu, TW;

Inventors:

Ming-Hui Tung, Hsinchu, TW;

Li-Jun Gu, Jiangsu, CN;

Guan-Yu Chen, Hsinchu County, TW;

Bo-Yu Chen, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); H03K 5/156 (2006.01); H03K 7/08 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1565 (2013.01); H03K 3/017 (2013.01); H03K 7/08 (2013.01);
Abstract

A clock circuit has a clock input terminal, a first clock output terminal, and a second clock output terminal. The clock circuit includes a pulse width adjustment module, a sampling module, a comparing module, and a differential signal converting module. A differential input terminal is electrically connected to a pulse width output terminal of the pulse width adjustment module. A positive differential signal output terminal and a negative differential signal output terminal are electrically connected to the first clock output terminal of the clock circuit and the second clock output terminal to output two clock signals with a phase difference of 180 degrees, respectively. A second input terminal of the sampling module is electrically connected to the second clock output terminal.


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