The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2020
Filed:
Feb. 27, 2017
Sharp Kabushiki Kaisha, Sakai, Osaka, JP;
Tokuo Yoshida, Sakai, JP;
Takuya Watanabe, Sakai, JP;
Akira Tagawa, Sakai, JP;
Yasuaki Iwase, Sakai, JP;
Kengo Hara, Sakai, JP;
SHARP KABUSHIKI KAISHA, Sakai, JP;
Abstract
An active matrix substrate is provided with a gate driver including a multi-stage shift register (). Each stage of the multi-stage shift register has a plurality of oxide semiconductor TFTs, a first input terminal for receiving a set signal, a second input terminal for receiving a clock signal, a third input terminal for receiving a clear signal, and an output terminal for outputting a gate output signal to one of the plurality of gate bus lines. The clock signal and the clear signal have the same high-level potential, and the clock signal and the clear signal have the same low-level potential. The plurality of oxide semiconductor TFTs include a first TFT () having a back-gate structure. The main gate electrode of the first TFT () is coupled to the third input terminal or a negative power supply voltage VSS. The back-gate electrode of the first TFT has a potential set to a positive power supply voltage VDD or a ground potential GND.