The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Aug. 16, 2017
Applicants:

Samsung Display Co., Ltd., Yongin-si, Gyeonggi-Do, KR;

Seoul National University R&db Foundation, Seoul, KR;

Inventors:

Jae Heung Ha, Suwon-si, KR;

Jong Woo Kim, Gwangmyeong-si, KR;

Ji Young Moon, Gwangju-si, KR;

Min Ho Oh, Suwon-si, KR;

Seung Jae Lee, Seoul, KR;

Yoon Hyeung Cho, Yongin-si, KR;

Young Cheol Joo, Hwaseong-si, KR;

Hyeong Joon Kim, Seoul, KR;

Eun-Kil Park, Seoul, KR;

Sang Jin Han, Seoul, KR;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/49 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1225 (2013.01); H01L 29/4908 (2013.01); H01L 29/7869 (2013.01);
Abstract

A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface layer. The interface layer includes a fluorinated silicon oxide. The semiconductor layer includes a p-type oxide semiconductor material.


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