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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10629530 B1

PDFFull Text
Date of Patent:
Apr. 21, 2020

Filed:

Apr. 05, 2017

Semiconductor device, electrical energy measurement instrument, and manufacturing method of semiconductor device

Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Shinichi Uchida, Kodaira, JP;

Keiichiro Tanaka, Kodaira, JP;

Takafumi Kuramoto, Kodaira, JP;

Assignee:

RENESAS ELECTRONICS CORPORATION, Tokyo, JP;

Attorney:

McDermott Will & Emery LLP

Primary Examiner:

Tony Tran

Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/522 (2006.01); H01F 17/00 (2006.01); G01R 15/18 (2006.01); G01R 19/00 (2006.01); H01F 27/28 (2006.01); H01F 27/34 (2006.01); H01F 41/04 (2006.01); H01L 21/3205 (2006.01); H01L 21/762 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 23/552 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5227 (2013.01); G01R 15/18 (2013.01); G01R 15/181 (2013.01); G01R 19/0092 (2013.01); H01F 17/0013 (2013.01); H01F 27/2804 (2013.01); H01F 27/34 (2013.01); H01F 41/041 (2013.01); H01L 21/32053 (2013.01); H01L 21/32055 (2013.01); H01L 21/76224 (2013.01); H01L 23/528 (2013.01); H01L 23/5225 (2013.01); H01L 23/53209 (2013.01); H01L 23/53271 (2013.01); H01L 23/552 (2013.01); H01L 29/0649 (2013.01); H01F 2017/008 (2013.01); H01F 2017/0073 (2013.01); H01F 2017/0086 (2013.01); H01F 2027/2809 (2013.01);
Abstract

According to one embodiment, a semiconductor deviceincludes an Si substrate, an inductorformed in wiring layers disposed above the Si substrate, and a shieldformed so as to surround the inductor, in which the shieldincludes metalstoformed in, among the wiring layers, a layer in which the inductoris formed and a layer above that layer, and a silicideformed between the Si substrateand the wiring layers above the Si substrate

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