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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10629503 B1

PDFFull Text
Date of Patent:
Apr. 21, 2020

Filed:

Mar. 15, 2019

Semiconductor device containing integrated circuit communicating with external apparatus via two terminals

Applicant:

Seoul National University R&db Foundation, Seoul, KR;

Inventors:

Jin Hong Ahn, Gyeonggi-do, KR;

Young June Park, Seoul, KR;

Assignee:

SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION, Seoul, KR;

Attorneys:

Nelson Mullins Riley & Scarborough LLP

Kongsik Kim, Esq.

Primary Examiner:

Stephen W Smoot

Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/66 (2006.01); H01L 29/732 (2006.01); B82Y 15/00 (2011.01); H01L 21/8238 (2006.01); H01L 27/06 (2006.01); H01L 29/93 (2006.01); G01R 27/02 (2006.01); H01L 23/00 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); B82Y 15/00 (2013.01); G01R 27/02 (2013.01); H01L 21/823892 (2013.01); H01L 22/20 (2013.01); H01L 24/27 (2013.01); H01L 24/29 (2013.01); H01L 24/43 (2013.01); H01L 24/45 (2013.01); H01L 27/0629 (2013.01); H01L 27/0928 (2013.01); H01L 29/0646 (2013.01); H01L 29/732 (2013.01); H01L 29/93 (2013.01); H01L 29/1087 (2013.01); H01L 29/8611 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13091 (2013.01);
Abstract

A semiconductor device and a method of fabricating the same are disclosed. A semiconductor device according to an embodiment of the present invention includes: a first type doped semiconductor substrate; a second type doped deep well configured such that one or more semiconductor device elements are formed therein; a first type doped first well formed inside a region surrounded by the deep well of the one surface of the semiconductor substrate, and separated from the semiconductor substrate by the deep well; a first electrical contact formed on a part of the one surface of the semiconductor substrate, and electrically connected to the first well; and a second electrical contact formed on another surface of the semiconductor substrate.

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