The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Dec. 10, 2018
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Te-Yin Chen, Taoyuan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/488 (2006.01);
U.S. Cl.
CPC ...
H01L 21/563 (2013.01); H01L 23/3114 (2013.01); H01L 23/488 (2013.01); H01L 24/09 (2013.01); H01L 24/17 (2013.01);
Abstract

The present disclosure relates to a semiconductor package and a method for manufacturing the same. The semiconductor package includes a first substrate, a blocking dam, and a first contact pad. The first substrate includes a chip-mounting region and an outer connecting region outside the chip-mounting region. The blocking dam is disposed over the first substrate, wherein the blocking dam is disposed between the chip-mounting region and the outer connecting region, the blocking dam surrounds the chip-mounting region and includes a metal layer, and the blocking dam is of a wave shape as seen in a top view of the blocking dam. A first contact pad is disposed over the first substrate, and the first contact pad is within the outer connecting region.


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