The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Jun. 21, 2018
Applicants:

Lite-on Electronics (Guangzhou) Limited, Guangzhou, CN;

Lite-on Technology Corporation, Taipei, TW;

Inventors:

Shih-Jia Zeng, Taipei, TW;

Jen-Chien Fu, Taipei, TW;

Tsu-Han Lu, Taipei, TW;

Kuan-Chun Chen, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G11C 29/52 (2006.01); G11C 29/42 (2006.01); G06F 11/00 (2006.01); G11C 11/56 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G11C 29/52 (2013.01); G06F 11/008 (2013.01); G06F 11/1048 (2013.01); G11C 11/5642 (2013.01); G11C 29/42 (2013.01); G11C 2029/0411 (2013.01);
Abstract

A solid state storage device is in communication with a host. The solid state storage device includes a control circuit and a non-volatile memory. The control circuit is in communication with the host. The control circuit includes an error correction circuit and a prediction model storage circuit. A prediction model is stored in the prediction model storage circuit. The non-volatile memory includes a memory cell array. The memory cell array includes plural blocks. Each of the blocks includes a corresponding state parameter. The control circuit determines a selected block from the memory cell array. The control circuit judges whether to perform a specified operation on the selected block according to the state parameter of the selected block and the prediction model.


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