The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Jul. 30, 2018
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Woongrae Kim, Icheon-si, KR;

Myung Kyun Kwak, Yongin-si, KR;

Tae Yong Lee, Seoul, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/12 (2006.01); G11C 8/18 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
G11C 8/12 (2013.01); G11C 8/18 (2013.01); G11C 11/408 (2013.01); G11C 11/4087 (2013.01);
Abstract

A semiconductor device includes a bank group selection signal generation circuit and a bank group address generation circuit. The bank group selection signal generation circuit stores a bank address based on a command pulse generated to perform a read operation or a write operation. The bank group selection signal generation circuit outputs the stored bank address as a bank group selection signal. The bank group address generation circuit generates a bank group address and an internal bank group address for performing a column operation of a cell array included in a bank group selected based on the bank group selection signal.


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