The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Dec. 05, 2017
Applicant:

Ricoh Company, Ltd., Tokyo, JP;

Inventors:

Takayuki Shibata, Kanagawa, JP;

Toshihiro Hamano, Tokyo, JP;

Tatsuya Ishii, Kanagawa, JP;

Assignee:

RICOH COMPANY, LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 15/177 (2006.01); G06F 13/12 (2006.01); G06F 15/163 (2006.01); G06F 1/24 (2006.01);
U.S. Cl.
CPC ...
G06F 15/177 (2013.01); G06F 1/24 (2013.01); G06F 13/126 (2013.01); G06F 15/163 (2013.01); G05B 2219/2231 (2013.01);
Abstract

An electronic apparatus includes a first processor and a second processor. The first processor includes a detection unit to detect output of an internal-reset occurrence signal from the second processor, and an identification unit to identify, as a source of the internal reset, the second processor in response to the internal-reset occurrence signal and an input of an identification signal from the second processor. The second processor includes an internal reset unit to internally reset the second processor in response to a malfunction of the second processor, a reset occurrence signal output unit to output the internal-reset occurrence signal in response to occurrence of the internal reset of the second processor, and an identification signal output unit to output, to the first processor, the identification signal indicating the source of the internal reset, in response to the occurrence of the internal reset of the second processor.


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