The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Feb. 03, 2017
Applicant:

Futurewei Technologies, Inc., Plano, TX (US);

Inventor:

Xiaobing Lee, Santa Clara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 11/10 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1673 (2013.01); G06F 11/1044 (2013.01); G06F 11/1048 (2013.01); G06F 13/4068 (2013.01);
Abstract

A hybrid DDR5 DIMM device includes a PCB board with a host interface through one of two DDR5 sub-channels, and a plurality of DDR4 or slow DDR5 SDRAM chips on the PCB coupled to this single channel DDR5 host interface. An embodiment processing system includes a host CPU to access one or more pairs of hybrid DDR5 DIMM devices for 4×DDR5 memory capacities (4DPC), a first or second hybrid DDR5 DIMM including a plurality of half-speed SDRAM chips, and a first or second DDR5 sub-channel coupled the host with slow SRAM chips on DIMM. Mounting same data-buffer and RCD chips on hybrid DIMM to a server motherboard can double available DDR4 DIMMs' speed to DDR5 speed rate. Pairs of hybrid DDR5 DIMM devices cascaded one-by-one can aggregate more DDR5 DIMM devices to expand memory capacities at double speed of DDR4 or DDR5 SDRAM chips, beyond current DDR5 speed limit 6400 MT/s.


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