The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Nov. 01, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Michael A. Blake, Wappingers Falls, NY (US);

Timothy C. Bronson, Round Rock, TX (US);

Pak-kin Mak, Poughkeepsie, NY (US);

Vesselina K. Papazova, Highland, NY (US);

Robert J. Sonnelitter, III, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/084 (2016.01); G06F 12/0862 (2016.01); G06F 12/0813 (2016.01); G06F 12/0811 (2016.01); G06F 12/0817 (2016.01);
U.S. Cl.
CPC ...
G06F 12/084 (2013.01); G06F 12/0811 (2013.01); G06F 12/0813 (2013.01); G06F 12/0826 (2013.01); G06F 12/0862 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/314 (2013.01); G06F 2212/602 (2013.01);
Abstract

Embodiments of the present invention are directed to managing a shared high-level cache for dual clusters of fully connected integrated circuit multiprocessors. An example of a computer-implemented method includes: providing a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors; providing a shared cache integrated circuit to manage a shared cache memory among the plurality of clusters; receiving, by the shared cache integrated circuit, an operation of one of a plurality of operation types from one of the plurality of processors; and processing, by the shared cache integrated circuit, the operation based at least in part on the operation type of the operation according to a set of rules for processing the operation type.


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