The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Nov. 21, 2017
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Takuro Kumabe, Kawasaki, JP;

Motohiro Sakai, Nerima, JP;

Keima Abe, Kawasaki, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/0875 (2016.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0611 (2013.01); G06F 3/0634 (2013.01); G06F 3/0655 (2013.01); G06F 3/0688 (2013.01); G06F 12/0875 (2013.01); G06F 2212/452 (2013.01);
Abstract

A storage control device includes a processor configured to receive from a host device a write request for writing data into a memory device. The processor is configured to try to write the data into a cache memory. The processor is configured to select an operation mode of a write process for the write request from among a first mode and a second mode on the basis of whether a cache hit or a cache miss occurs at the trial. The processor is configured to return a response to the host device upon completion of writing the data into the cache memory without waiting for completion of the write process when the write process is performed in the first mode. The processor is configured to return a response to the host device upon completion of the write process when the write process is performed in the second mode.


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