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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10622463 B1

PDFFull Text
Date of Patent:
Apr. 14, 2020

Filed:

Sep. 28, 2018

Method, apparatus and system for improved performance using tall fins in finfet devices

Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Hui Zang, Guilderland, NY (US);

Min-Hwa Chi, San Jose, CA (US);

Jinping Liu, Ballston Lake, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:

Williams Morgan, P.C.

Primary Examiner:

Victoria K Hall

Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/306 (2006.01); H01L 21/8234 (2006.01); H01L 21/02 (2006.01); H01L 27/088 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02554 (2013.01); H01L 21/306 (2013.01); H01L 21/30604 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/0847 (2013.01); H01L 29/785 (2013.01);
Abstract

At least one method, apparatus and system disclosed herein fin field effect transistor (finFET) comprising a tall fin having a plurality of epitaxial regions. A first fin of a transistor is formed. The first fin comprising a first portion comprising silicon, a second portion comprising silicon germanium and a third portion comprising silicon. A gate structure above the third portion is formed. An etching process is performed for removing the silicon germanium of the second portion that is not below the gate structure. A first epitaxy region is formed above the first portion. A second epitaxy region is formed vertically aligned with the first epitaxy region and above the silicon germanium of the second portion that is below the gate structure.

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