The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2020

Filed:

Sep. 29, 2017
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Andre Schmenn, Sachsenkam, DE;

Stefan Pompl, Landshut, DE;

Damian Sojka, Regensburg, DE;

Katharina Umminger, Wenzenbach, DE;

Assignee:

INFINEON TECHNOLOGIES AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 23/60 (2006.01); H01L 21/78 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 25/07 (2006.01); H01L 25/00 (2006.01); H01L 29/74 (2006.01); H02H 9/04 (2006.01); H01L 27/07 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0248 (2013.01); H01L 21/78 (2013.01); H01L 23/5386 (2013.01); H01L 23/5389 (2013.01); H01L 23/60 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/97 (2013.01); H01L 25/072 (2013.01); H01L 25/50 (2013.01); H01L 27/0255 (2013.01); H01L 27/0262 (2013.01); H01L 27/0292 (2013.01); H01L 29/7416 (2013.01); H02H 9/04 (2013.01); H01L 27/0744 (2013.01); H01L 29/74 (2013.01); H01L 2224/214 (2013.01); H01L 2224/95001 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1301 (2013.01); H01L 2924/30205 (2013.01);
Abstract

A method for manufacturing an electronic device includes: providing a semiconductor carrier including first and second vertically integrated electronic structures laterally spaced apart from each other, an electrical connection layer disposed over a first side of the semiconductor carrier and electrically connecting the first and second vertically integrated electronic structures with each other; mounting the semiconductor carrier on a support carrier with the first side of the semiconductor carrier facing the support carrier; thinning the semiconductor carrier from a second side opposite the first side; and removing material of the semiconductor carrier in a separation region between the first and second vertically integrated electronic structures to separate a first semiconductor region of the first vertically integrated electronic structure from a second semiconductor region of the second vertically integrated electronic structure with the first and second vertically integrated electronic structures remaining electrically connected with each other via the electrical connection layer.


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