The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2020
Filed:
May. 05, 2017
Xilinx, Inc., San Jose, CA (US);
Rafael C. Camarota, San Jose, CA (US);
Ian A. Swarbrick, Santa Clara, CA (US);
Kin Yip Sit, Sunnyvale, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Embodiments herein describe techniques for assigning address ranges to ports in switches forming a packet protocol switch network in an integrated circuit. Instead of relying on a designer to provide the addresses, the integrated circuit can include an address bus which is incremented as addresses are assigned to the ports. In one embodiment, the port addresses are assigned from a root device and defines the address range of each branch port and the address of each endpoint in the network. As the address bus reaches an endpoint, an adder in the endpoint increments the value of the address bus (e.g., the current address). The address bus may use serial or parallel data communication to assign the addresses. In another embodiment, instead of using a separate address bus, a data bus typically used for packet communication assigns the addresses to the ports in the network.