The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2020

Filed:

May. 16, 2018
Applicant:

National Instruments Corporation, Austin, TX (US);

Inventors:

Rafael Castro Scorsi, Round Rock, TX (US);

Hector M. Rubio, Austin, TX (US);

Gerardo Daniel Domene-Ramirez, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G05B 19/418 (2006.01); G06F 13/24 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
G06F 11/0745 (2013.01); G05B 19/4183 (2013.01); G06F 11/006 (2013.01); G06F 11/0772 (2013.01); G06F 13/24 (2013.01); G05B 2219/31282 (2013.01); G05B 2219/31284 (2013.01); Y02P 90/10 (2015.11); Y02P 90/12 (2015.11);
Abstract

A system may include a data acquisition hardware device (DAQ) for acquiring sample data and/or generating control signals, and a host system with memory that may store data samples and information associated with the DAQ and host system operations. The DAQ may push hardware status information to host memory, triggered by predetermined events taking place in the DAQ, e.g. timing events or interrupts. The DAQ may update dedicated buffers in host memory with status data for any of these events. The pushed status information may be read in a manner that allows detection of race conditions, and may be used to handle data acquisition, output control signaling, and interrupts as required without the host system having to query the DAQ. The DAQ may also detect data timing errors and report those data timing errors back to the host system, and also provide improved output operations using counters.


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