The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2020

Filed:

Aug. 22, 2018
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Jin Man Jung, Suwon-si, KR;

Jin Kyung Joo, Suwon-si, KR;

Ik Hwan Chang, Suwon-si, KR;

Taek Jung Lee, Suwon-si, KR;

Won Young Lee, Suwon-si, KR;

Yong Won Seo, Suwon-si, KR;

Jin Woo Chun, Suwon-si, KR;

Assignee:

SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/012 (2006.01); H01G 4/232 (2006.01); H01G 4/30 (2006.01); H01G 4/12 (2006.01); H05K 1/18 (2006.01); H05K 3/34 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/181 (2013.01); H01G 4/012 (2013.01); H01G 4/12 (2013.01); H01G 4/232 (2013.01); H01G 4/30 (2013.01); H05K 1/111 (2013.01); H05K 3/3431 (2013.01); H01G 4/1227 (2013.01); H05K 2201/10015 (2013.01); Y02P 70/611 (2015.11); Y02P 70/613 (2015.11);
Abstract

A capacitor includes a body including a plurality of dielectric layers, first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween, and first and second insulating regions. The first insulating region is disposed in each of the first internal electrodes and includes a first connection electrode disposed therein. The second insulating region is disposed in each of the second internal electrodes and includes a second connection electrode disposed therein. The products D1×Td and D2×Td are greater than 20 μm, where Td is a thickness of the dielectric layer, and D1 and D2 are widths of the first and second insulating regions, respectively.


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