The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2020

Filed:

Apr. 26, 2018
Applicant:

Dts, Inc., Calabasas, CA (US);

Inventors:

Jacek Stachurski, Woodland Hills, CA (US);

Zoran Fejzo, Los Angeles, CA (US);

Assignee:

DTS, Inc., Calabasas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/835 (2013.01); H04L 12/851 (2013.01); H04N 7/50 (2006.01); G06T 9/00 (2006.01); G10L 19/008 (2013.01); H04N 19/152 (2014.01); H04L 29/06 (2006.01); G10L 19/002 (2013.01);
U.S. Cl.
CPC ...
H04N 19/152 (2014.11); G10L 19/002 (2013.01); H04L 65/607 (2013.01);
Abstract

Systems and methods are described for processing data from a sequential series of groups of frames to achieve a target average processing bit rate for a particular group of frames in the series. In an example, a look-ahead buffer circuit can be populated with a number of frames from a particular group of frames, and a bit allocation can be determined for a frame in the look-ahead buffer circuit using bit request information about all of the frames in the buffer. The look-ahead buffer circuit can be populated with streaming frame information in a first-in-first-out manner, and bit allocation processing can be performed for each frame, in a particular group of frames, based on a frame position in the look-ahead buffer circuit and further based on bit requests associated with other frames in the look-ahead buffer circuit.


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