The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2020
Filed:
Apr. 18, 2019
Naval Information Warfare Center Pacific, San Diego, CA (US);
Eric N. Cartagena, San Diego, CA (US);
Henry D. Ngo, San Diego, CA (US);
Jener S. Chang, San Diego, CA (US);
United States of America represented by the Secretary of the Navy, Washington, DC (US);
Abstract
A logic circuit for preventing false signals generated by radiation particle hits on sensitive nodes the circuit, comprising a first logic gate coupled to a third logic gate, a second logic gate coupled to the third logic gate, a multiplexer coupled to the third logic gate, an inverter coupled to the multiplexer, a pulldown transistor coupled to the first logic gate, and a latch coupled to the pulldown transistor. The first logic gate is coupled to the second logic gate, the pulldown transistor, and the latch. The second logic gate is coupled to the pulldown transistor and latch. The latch is coupled to the third logic gate and multiplexer. The multiplexer is coupled to the first logic gate and coupled to the second logic gate. The third logic gate outputs a high output signal only if both the first logic gate and second logic gate outputs the high output signal.