The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2020
Filed:
Dec. 22, 2017
International Business Machines Corporation, Armonk, NY (US);
Xuefeng Liu, Schenectady, NY (US);
Junli Wang, Albany, NY (US);
Brent A. Anderson, Jericho, VT (US);
Terence B. Hook, Jericho, VT (US);
Gauri Karve, Cohoes, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A vertical field-effect transistor (FET) device and an input/output (IO) FET device are formed. The vertical FET device is formed in a vertical FET device area of a substrate and the IO FET device is formed in an IO FET device area of the substrate. Forming the vertical FET device and the IO FET device includes forming a plurality of first fin structures in the vertical FET device area and forming at least two second fin structures in the IO FET device area. The at least two second fin structures are separated by a distance associated with a length of a channel connecting the at least two fin structures in the IO FET device area. The length of the channel is determined based on at least one voltage for implementing the IO FET device.