The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2020

Filed:

Jun. 30, 2017
Applicant:

SK Hynix Inc., Icheon, KR;

Inventors:

Hak Song Kim, Seoul, KR;

Dong Kyun Kim, Cheongju, KR;

Dong Uk Lee, Seoul, KR;

Assignee:

SK hynix Inc., Icheon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); G06F 1/10 (2006.01); G11C 7/10 (2006.01); G11C 7/22 (2006.01); G11C 11/4096 (2006.01); G11C 11/4076 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); G06F 1/10 (2013.01); G11C 7/109 (2013.01); G11C 7/1066 (2013.01); G11C 7/1072 (2013.01); G11C 7/222 (2013.01); G11C 11/4076 (2013.01); G11C 11/4096 (2013.01);
Abstract

A semiconductor device includes a detection signal generation circuit generating a detection signal by detecting a phase difference of an input signal and an internal clock, and generating delayed input signals by delaying the input signal. The semiconductor device further includes an output enable signal generation circuit outputting an output enable signal by selecting one of the delayed input signals in response to the detection signal and latching the selected one of the delayed input signals in synchronization with the internal clock. The output enable signal may initiate a data transfer operation.


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