The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Nov. 04, 2015
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Olivier Colle, Bellevue, WA (US);

Jaideep Sarkar, Redmond, WA (US);

Muralidhar Sathsahayaraman, Bothell, WA (US);

Radu Bogdan Gruian, Sammamish, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 16/957 (2019.01); H04L 12/24 (2006.01); H04L 12/26 (2006.01); H04L 29/08 (2006.01);
U.S. Cl.
CPC ...
H04L 41/5054 (2013.01); G06F 16/957 (2019.01); G06F 16/9574 (2019.01); H04L 41/12 (2013.01); H04L 43/0852 (2013.01); H04L 67/10 (2013.01); H04L 41/0896 (2013.01); H04L 41/5009 (2013.01); H04L 41/5067 (2013.01); H04L 41/5096 (2013.01);
Abstract

Examples of the disclosure enable one or more operations to be executed or implemented while managing computational resources. In some examples, an instruction to implement a first operation is received. The first operation is associated with a first node of a plurality of nodes. The plurality of nodes are arranged in a plurality of regions. A second node of the plurality of nodes that is related to the first node is identified. On condition that the second node is arranged in an active region of the plurality of regions, a second operation associated with the second node is implemented within a period of time. On condition that the second node is not arranged in the active region, the second operation is not implemented within the period of time. Aspects of the disclosure enable a computing device to defer the implementation of an operation to facilitate managing computational resources.


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