The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Jun. 26, 2018
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Ionut C. Cical, Saggart, IE;

Diarmuid Collins, Dunshaughlin, IE;

John K. Jennings, Glenageary, IE;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/687 (2006.01); H03K 17/16 (2006.01); G05F 1/44 (2006.01); H03M 1/34 (2006.01);
U.S. Cl.
CPC ...
H03K 17/6872 (2013.01); G05F 1/44 (2013.01); H03K 17/161 (2013.01); H03M 1/34 (2013.01);
Abstract

A complementary metal-oxide-semiconductor (CMOS) switching system with increased supply rejection is disclosed. The system comprises a voltage regulator and a CMOS circuit. The voltage regulator receives a supply voltage and generates a regulated voltage by regulating an amplitude of the received supply voltage. The CMOS circuit includes an input terminal to receive a first voltage, switching circuitry to selectively couple the CMOS circuit to the voltage regulator in one of a plurality of configurations, and an output terminal to output a second voltage based at least in part on the first voltage and the regulated voltage when the CMOS circuit is coupled to the voltage regulator in a first configuration of the plurality of configurations.


Find Patent Forward Citations

Loading…