The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Mar. 04, 2016
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Shinya Fukayama, Nagoya Aichi, JP;

Yukifumi Oyama, Yokkaichi Mie, JP;

Keisuke Taniguchi, Yokkaichi Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 24/14 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/75 (2013.01); H01L 24/81 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13014 (2013.01); H01L 2224/1319 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/14131 (2013.01); H01L 2224/14135 (2013.01); H01L 2224/14152 (2013.01); H01L 2224/14177 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/14505 (2013.01); H01L 2224/14517 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/75315 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/1438 (2013.01); H01L 2924/14511 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor device includes a semiconductor chip in which a first bump is provided on a first surface, a plurality of first adhesives are provided on the first surface of the semiconductor chip, and a second adhesive is provided on the first surface of the semiconductor chip, and of which a layout area on the first surface is smaller than a layout area of the plurality of first adhesives. In comparison to a first adhesive that is farthest from the center or a moment of inertia of the first surface of the semiconductor chip among the plurality of the first adhesives, the second adhesive is provided farther from the center or the moment of inertia of the semiconductor chip.


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