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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10607953 B1

PDFFull Text
Date of Patent:
Mar. 31, 2020

Filed:

Dec. 20, 2018

Substrate-less waveguide active circuit module with current mode power combining

Applicant:

The United States of America, As Represented BY the Secretary of the Navy, San Diego, CA (US);

Inventor:

Jia-Chi S. Chieh, San Diego, CA (US);

Assignee:

United States of America as represented by Secretary of the Navy, Washington, DC (US);

Attorneys:

Naval Information Warfare Center, Pacific

Kyle Eppele

Elliott J. Deaderick

Primary Examiner:

Tong-Ho Kim

Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 23/053 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01P 3/123 (2006.01); H01P 11/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 21/4817 (2013.01); H01L 23/053 (2013.01); H01L 24/48 (2013.01); H01P 3/123 (2013.01); H01P 11/002 (2013.01); H01L 2223/6611 (2013.01); H01L 2223/6683 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/48455 (2013.01);
Abstract

A device includes an enclosure cover having a groove portion disposed on one surface, a chip carrier attachable to and removable from the enclosure cover in the groove portion, the chip carrier including at least two cavities disposed on one surface and located on opposite sides, each cavity has a slot extending to an opposite surface of the chip carrier. Also included is a ridge gap waveguide (RGW) cover with a plurality of pillars disposed on one surface, and a plurality of ridges are also disposed on the one surface. Each ridge includes a branching junction such that each ridge branches to at least two ridge portions. The enclosure cover and the RGW cover are configured to connect to each other with the chip carrier located therebetween, and the opposite surface of the chip carrier faces the one surface of the RGW cover.

Find Patent Forward Citations

Chieh, Jia-Chi. (2020). Substrate-less waveguide active circuit module with current mode power combining (U.S. Patent No. 10607953). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10607953

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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