The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Sep. 25, 2017
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Seungwon Im, Bucheon-si, KR;

Oseob Jeon, Seoul, KR;

Byoungok Lee, Bucheon-si, KR;

Yoonsoo Lee, Incheon, KR;

Joonseo Son, Seoul, KR;

Dukyong Lee, Cheon-an, KR;

Changyoung Park, Ilsan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/433 (2006.01); H01L 23/13 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); H01L 23/473 (2006.01); H01L 23/495 (2006.01); H01L 23/24 (2006.01);
U.S. Cl.
CPC ...
H01L 23/433 (2013.01); H01L 23/13 (2013.01); H01L 23/4334 (2013.01); H01L 23/473 (2013.01); H01L 23/49568 (2013.01); H01L 23/49861 (2013.01); H01L 25/0657 (2013.01); H01L 23/24 (2013.01); H01L 2224/33 (2013.01);
Abstract

Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.


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