The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Mar. 07, 2018
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventor:

Takayuki Shimatou, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/13 (2006.01); H01L 21/768 (2006.01); H01L 23/50 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/13 (2013.01); H01L 21/768 (2013.01); H01L 23/3107 (2013.01); H01L 23/49811 (2013.01); H01L 23/50 (2013.01); H01L 23/49838 (2013.01);
Abstract

To provide a semiconductor package including a protruding part at the bottom surface of a package main body. A semiconductor package including a semiconductor chip is provided, the semiconductor package including: a package main body; a plurality of electrodes exposed at a bottom surface of the package main body; and a protruding part projecting from the bottom surface of the package main body and above the plurality of electrodes, wherein the protruding part is arranged not to overlap two least separated electrodes, among the plurality of electrodes, in a second direction different from a first direction in which the two electrodes are arrayed.


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