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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10607855 B1

PDFFull Text
Date of Patent:
Mar. 31, 2020

Filed:

Jan. 04, 2018

Method for fabricating semiconductor device using a hybrid mask pattern

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Jun Ho Yoon, Suwon-si, KR;

Jae Hong Park, Seongnam-si, KR;

Da Il Eom, Goyang-si, KR;

Sung Yeon Kim, Jeongeup-si, KR;

Jin Young Park, Anyang-si, KR;

Yong Moon Jang, Incheon, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:

Volentine, Whitt & Francos, PLLC

Primary Examiner:

Mark W Tornow

Assistant Examiner:

Abbigale A Boyle

Int. Cl.
CPC ...
H01L 21/3213 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 27/108 (2006.01); G03F 1/00 (2012.01); H01L 21/304 (2006.01); H01L 49/02 (2006.01); H01L 21/033 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32139 (2013.01); G03F 1/0053 (2013.01); H01L 21/0337 (2013.01); H01L 21/304 (2013.01); H01L 21/3081 (2013.01); H01L 21/3086 (2013.01); H01L 21/31144 (2013.01); H01L 27/108 (2013.01); H01L 27/10852 (2013.01); H01L 28/90 (2013.01);
Abstract

A method for fabricating a semiconductor device includes forming an insulating layer on a substrate; forming a first mask pattern including silicon on the insulating layer and forming a second mask pattern including an oxide on the first mask pattern; forming a coating layer that includes carbon and which covers an upper surface of the insulating layer, a sidewall of the first mask pattern, and the second mask pattern; removing a portion of the coating layer and the second mask pattern; forming a metal layer on an upper surface of the first mask pattern and on a sidewall of the coating layer; exposing the upper surface of the insulating layer by removing the coating layer; and etching the insulating layer by using the first mask pattern and the metal layer as a mask.

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