The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Nov. 13, 2018
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

I Yeong Jung, Icheon-si, KR;

Geun Il Lee, Yongin-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G11C 11/4074 (2006.01); G11C 7/10 (2006.01); G11C 11/4096 (2006.01); G11C 11/4093 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40615 (2013.01); G11C 7/109 (2013.01); G11C 7/1063 (2013.01); G11C 7/1084 (2013.01); G11C 11/4074 (2013.01); G11C 11/4093 (2013.01); G11C 11/4096 (2013.01); G11C 11/40607 (2013.01); G11C 11/40626 (2013.01);
Abstract

A semiconductor memory device may include a control signal generation circuit, a period signal generation circuit and a selection circuit. The control signal generation circuit may be configured to generate a control signal in response to a mode signal, a voltage detection signal and a temperature detection signal. The period signal generation circuit may be configured to generate a period signal periodically transited in response to the control signal. The selection circuit may be configured to output, in response to the control signal, any one of the period signal and a signal from an external device that is buffered.


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