The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Mar. 22, 2018
Applicant:

Ablic Inc., Chiba-shi, Chiba, JP;

Inventor:

Kaoru Sakaguchi, Chiba, JP;

Assignee:

ABLIC INC., Chiba, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 11/07 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1441 (2013.01); G06F 11/0736 (2013.01); G06F 11/0757 (2013.01); G06F 11/3024 (2013.01); G06F 11/3055 (2013.01); G06F 11/3089 (2013.01); G06F 2201/805 (2013.01); G06F 2201/81 (2013.01); G06F 2201/82 (2013.01);
Abstract

Provided is a monitoring circuit equipped with a first abnormality detection circuit which detects a first abnormal state of a semiconductor device under surveillance, a second abnormality detection circuit which detects a second abnormal state of the semiconductor device under surveillance, a reset circuit which outputs a reset signal based on a logical sum of a first abnormality detection signal output from the first abnormality detection circuit and a second abnormality detection signal output from the second abnormality detection circuit to a first output terminal, and an output holding circuit which stores which of the first abnormality detection signal and the second abnormality detection signal is supplied, and outputs an abnormality discrimination signal corresponding thereto to a second output terminal.


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