The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

May. 31, 2018
Applicant:

Huizhou China Star Optoelectronics Technology Co., Ltd., Huizhou Guangdong, CN;

Inventors:

Yung-jui Lee, Huizhou Guangdong, CN;

Chengwen Que, Huizhou Guangdong, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1345 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); G02F 1/1339 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13452 (2013.01); G02F 1/1339 (2013.01); H01L 23/498 (2013.01); H01L 23/4985 (2013.01); H01L 24/50 (2013.01); H01L 24/86 (2013.01); G02F 1/1345 (2013.01); G02F 2001/13398 (2013.01); H01L 23/49805 (2013.01); H01L 23/49861 (2013.01); H01L 23/49883 (2013.01); H01L 24/27 (2013.01); H01L 24/31 (2013.01);
Abstract

The present invention discloses a liquid crystal panel, includes a color filter substrate, an array substrate, a liquid crystal disposed between the color filter substrate and the array substrate, a chip on film, a driver chip and a circuit board disposed on the chip on film, one end of the chip on film is bonded to an end face of the array substrate and is electrically connected with a metal line array in the array substrate, the other end of the chip on film is bound with the circuit board. The invention also discloses a method for fabricating a liquid crystal panel and a display apparatus. When applying signal to the liquid crystal panel, the chip on film is bonded to the end face of the array substrate to realize the conduction of the metal line array avoiding the longer bonding region extended from a side of the TFT substrate.


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