The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2020

Filed:

Apr. 12, 2018
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Alan Dodson Smith, Austin, TX (US);

Vydhyanathan Kalyanasundharam, San Jose, CA (US);

Bryan P. Broussard, Austin, TX (US);

Greggory D. Donley, San Jose, CA (US);

Chintan S. Patel, Bee Cave, TX (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/873 (2013.01); H04L 12/841 (2013.01); H04L 12/877 (2013.01); H04L 12/875 (2013.01); H04L 12/54 (2013.01); H04L 12/70 (2013.01);
U.S. Cl.
CPC ...
H04L 47/524 (2013.01); H04L 47/28 (2013.01); H04L 47/525 (2013.01); H04L 47/566 (2013.01); H04L 12/5602 (2013.01); H04L 2012/5679 (2013.01);
Abstract

A computing system uses a memory for storing data, one or more clients for generating network traffic and a communication fabric with network switches. The network switches include centralized storage structures, rather than separate input and output storage structures. The network switches store particular metadata corresponding to received packets in a single, centralized collapsing queue where the age of the packets corresponds to a queue entry position. The payload data of the packets are stored in a separate memory, so the relatively large amount of data is not shifted during the lifetime of the packet in the network switch. The network switches select sparse queue entries in the collapsible queue, deallocate the selected queue entries, and shift remaining allocated queue entries toward a first end of the queue with a delay proportional to the radix of the network switches.


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