The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2020
Filed:
Jul. 28, 2017
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventors:
Mi Hyun Kim, Seoul, KR;
Sam Mook Kang, Hwaseong-si, KR;
Jun Youn Kim, Hwaseong-si, KR;
Young Jo Tak, Seongnam-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); C30B 25/18 (2006.01); C30B 25/04 (2006.01); C30B 25/02 (2006.01); C30B 29/40 (2006.01); H01L 21/78 (2006.01); B08B 3/02 (2006.01); B08B 3/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0254 (2013.01); C30B 25/02 (2013.01); C30B 25/04 (2013.01); C30B 25/183 (2013.01); C30B 25/186 (2013.01); C30B 29/406 (2013.01); H01L 21/0206 (2013.01); H01L 21/0217 (2013.01); H01L 21/02027 (2013.01); H01L 21/0243 (2013.01); H01L 21/0262 (2013.01); H01L 21/02068 (2013.01); H01L 21/02096 (2013.01); H01L 21/02164 (2013.01); H01L 21/02178 (2013.01); H01L 21/02181 (2013.01); H01L 21/02247 (2013.01); H01L 21/02271 (2013.01); H01L 21/02304 (2013.01); H01L 21/02307 (2013.01); H01L 21/02381 (2013.01); H01L 21/02433 (2013.01); H01L 21/02458 (2013.01); H01L 21/02488 (2013.01); H01L 21/02491 (2013.01); H01L 21/02499 (2013.01); H01L 21/02502 (2013.01); H01L 21/02505 (2013.01); H01L 21/02598 (2013.01); H01L 21/02642 (2013.01); H01L 21/02658 (2013.01); H01L 21/02664 (2013.01); B08B 3/024 (2013.01); B08B 3/12 (2013.01); H01L 21/7806 (2013.01);
Abstract
A method of manufacturing a gallium nitride substrate, the method including forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a second buffer layer on the first buffer layer such that the second buffer layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer.