The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2020
Filed:
Aug. 31, 2018
Applicant:
Toshiba Memory Corporation, Tokyo, JP;
Inventors:
Tomoya Kodama, Kawasaki Kanagawa, JP;
Takayuki Itoh, Kawasaki Kanagawa, JP;
Assignee:
TOSHIBA MEMORY CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/26 (2006.01); G11C 29/44 (2006.01); G11C 8/12 (2006.01); G06K 9/62 (2006.01); G11C 29/42 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3404 (2013.01); G06K 9/6223 (2013.01); G11C 8/12 (2013.01); G11C 11/5628 (2013.01); G11C 11/5642 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 29/42 (2013.01); G11C 29/44 (2013.01); G11C 2211/561 (2013.01);
Abstract
According to one embodiment, a memory system includes memory cells capable of having data written therein at different write levels. A memory controller is configured to detect first data of the memory cells, then apply a first voltage that is lower than a voltage used for writing the data to the plurality of memory cells, detect second data of the memory cells after the first voltage has been applied, and estimate a write level for the data written to the memory cells based on a comparison of the first data and the second data.