The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2020
Filed:
Jan. 09, 2018
Applicant:
Lg Electronics Inc., Seoul, KR;
Inventors:
Assignee:
LG ELECTRONICS INC., Seoul, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/3205 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 31/072 (2012.01); H01L 31/0747 (2012.01); H01L 31/18 (2006.01); H01L 31/20 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32055 (2013.01); H01L 21/02592 (2013.01); H01L 21/28 (2013.01); H01L 31/072 (2013.01); H01L 31/0747 (2013.01); H01L 31/1804 (2013.01); H01L 31/202 (2013.01); Y02E 10/547 (2013.01); Y02P 70/521 (2015.11);
Abstract
A method of manufacturing a solar cell is disclosed. The method of manufacturing the solar cell includes depositing an intrinsic amorphous silicon layer on a surface of a semiconductor substrate, depositing an amorphous silicon layer containing impurities on the intrinsic amorphous silicon layer to form a conductive region, and forming an electrode electrically connected to the conductive region. The depositing of the intrinsic amorphous silicon layer includes depositing the intrinsic amorphous silicon on the surface of the semiconductor substrate at a deposition rate of 0.5 nm/sec to 2.0 nm/sec.