The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2020

Filed:

Sep. 05, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Takashi Furuhashi, Kuwana, JP;

Masayuki Tanaka, Yokkaichi, JP;

Shinji Mori, Yokkaichi, JP;

Kenichiro Toratani, Kuwana, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/67 (2006.01); H01L 21/28 (2006.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 21/022 (2013.01); H01L 21/0228 (2013.01); H01L 21/02172 (2013.01); H01L 21/02178 (2013.01); H01L 21/28 (2013.01); H01L 21/67098 (2013.01); H01L 21/67207 (2013.01); H01L 27/11582 (2013.01); H01L 29/40117 (2019.08);
Abstract

According to an embodiment, a manufacturing method of a semiconductor device includes: carrying a substrate alternately stacked an electrode layer and an insulation layer into a chamber; increasing the temperature in the chamber to a predetermined temperature; and supplying hydrogen and material gas including metal simultaneously into the chamber, and supplying oxidizing gas the partial pressure ratio of which to the hydrogen is set so as to provide an atmosphere of reducing the electrode layer, by using an ALD method, and thereby forming, on a surface of the electrode layer and a surface of the insulation layer, a metal oxide layer obtained by oxidizing the metal.


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