The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2020

Filed:

Oct. 04, 2017
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventor:

Hyun-Seok Kim, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/04 (2006.01); G11C 7/22 (2006.01); G06F 13/16 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G11C 5/04 (2013.01); G06F 13/1694 (2013.01); G11C 7/222 (2013.01); G11C 7/225 (2013.01); G11C 2029/0411 (2013.01);
Abstract

A memory module includes a front side interface configured to serial-to-parallel convert a command, an address, and data, based on a host clock, and transfer the converted command, address, and data; a processing block configured to operate in synchronization with a division clock, process the command, address, and data transferred from the front side interface, and transfer the processed command, address, and data; a back side interface configured to include a PLL for generating a media clock having a frequency different from the host clock, to parallel-to-serial convert the command, address, and data transferred from the processing block, based on the media clock, and to transfer the converted command, address, and data; and memory devices configured to operate in synchronization with the media clock, and to write the data transferred from the back side interface therein in response to the command and address transferred from the back side interface.


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