The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2020

Filed:

Jul. 26, 2018
Applicant:

Landa Labs (2012) Ltd., Rehovot, IL;

Inventors:

Nir Rubin Ben Haim, Hod HaSharon, IL;

Michael Nagler, Tel Aviv, IL;

Benzion Landa, Nes Ziona, IL;

Tamar Kashti, Nes Ziona, IL;

Ofer Aknin, Petach Tikva, IL;

Ronen Yogev, Kibbutz Hulda, IL;

Itai Tzur, Kibbutz Na'an, IL;

Assignee:

LANDA LABS (2012) LTD., Rehovot, IL;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/20 (2006.01); B41J 2/447 (2006.01); B41J 2/45 (2006.01); B41J 2/455 (2006.01); G03G 15/04 (2006.01); G03G 15/043 (2006.01); G03G 15/34 (2006.01);
U.S. Cl.
CPC ...
G03F 7/70025 (2013.01); B41J 2/447 (2013.01); B41J 2/45 (2013.01); B41J 2/451 (2013.01); B41J 2/455 (2013.01); G03G 15/043 (2013.01); G03G 15/04072 (2013.01); G03G 15/342 (2013.01);
Abstract

An imaging device for projecting individually controllable laser beams onto an imaging surface movable in an X-direction. The device includes a plurality of semiconductor chips each comprising a plurality of laser beam emitting elements arranged in a main array of M·N. The chips are mounted such that each pair of adjacent chips in the Y-direction are offset from one another in the X-direction and, if activated continuously, the emitted laser beams of the two chips of said pair trace on the imaging surface a set of parallel lines that are substantially uniformly spaced in the Y-direction. In addition to the M·N elements of the main array, each chip comprises at least one additional column on one or each side, each additional column containing at least one selectively operable element capable of compensating for any misalignment in the Y-direction in the relative positioning of the adjacent chips on the support.


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