The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Apr. 07, 2017
Applicant:

Infinera Corp., Annapolis Junction, MD (US);

Inventors:

Abishek Gopalan, San Jose, CA (US);

Rajan Rao, Fremont, CA (US);

Biao Lu, Saratoga, CA (US);

Assignee:

Infinera Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/26 (2006.01); H04L 12/703 (2013.01); H04L 12/707 (2013.01); H04L 12/715 (2013.01);
U.S. Cl.
CPC ...
H04L 45/28 (2013.01); H04L 45/22 (2013.01); H04L 45/64 (2013.01);
Abstract

Memory devices, methods and systems are described in which a non-transitory memory device stores instructions that, when executed by a processor, cause the processor to: receive, via an input component, at least one message from a network element in a multi-layer network comprising information indicative of at least one failure of a working path; determine based at least in part on information indicative of a data transport path coincident with the working path in a second layer in the network different from the first layer, an alternate path in the first layer for transmission of the data through the multi-layer network; and transmit, via an output component, at least one signal comprising configuration instructions to at least one line module, the configuration instructions directing the line module to switch and transmit the data using the alternate path.


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