The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2020
Filed:
Jun. 06, 2019
Linear Technology Holding Llc, Wilmington, DE (US);
Gitesh Bhagwat, Santa Barbara, CA (US);
Linear Technology Holding LLC, Norwood, MA (US);
Abstract
In a PoDL system, a PHY has its I/O terminals coupled to a wire pair via a galvanic isolation transformer and a CMC. Thus, DC power and common mode noise are blocked from the PHY inputs. One end of the secondary winding of the transformer is directly coupled to one winding of the CMC. A DC power supply has its positive voltage terminal directly coupled to the other end of the secondary winding and has its other output terminal (e.g., ground) directly coupled to the other winding of the CMC. An AC-coupling capacitor is coupled between the two outputs of the power supply. Differential signals are applied across the secondary winding to couple the differential signals to the PHY, while the secondary winding conducts the DC voltage to one of the wires (via the CMC), and the ground is coupled to the other one of the wires (via the CMC).