The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Jul. 24, 2018
Applicant:

Psemi Corporation, San Diego, CA (US);

Inventors:

Jonathan James Klaren, San Diego, CA (US);

Tero Tapio Ranta, San Diego, CA (US);

Assignee:

pSemi Corporation, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/22 (2006.01); H03F 1/02 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0266 (2013.01); H03F 1/0222 (2013.01); H03F 1/223 (2013.01); H03F 2200/18 (2013.01);
Abstract

A biasing circuit with high current drive capability for fast settling of a biasing voltage to a stacked cascode amplifier is presented. According to a first aspect, the biasing circuit uses transistors matched with transistors of the cascode amplifier to generate a boost current during a transition phase that changes the biasing voltage by charging or discharging a capacitor. The boost current is activated during the transition phase and deactivated when a steady-state condition is reached. According to a second aspect, the biasing circuit uses an operational amplifier in a feedback loop that forces a source node of a cascode transistor of a reference circuit, that is a scaled down replica version of the cascode amplifier, to be at a reference voltage. The high gain and high current capability of the operational amplifier, provided by isolating a high frequency signal processed by the cascode amplifier from the reference circuit, allow for a quick settling of the biasing voltage.


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