The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Apr. 20, 2015
Applicant:

Surecore Limited, Leeds, GB;

Inventor:

Andrew Pickering, Rugby, GB;

Assignee:

SURECORE LIMITED, Leeds, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/12 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 7/12 (2013.01); G11C 2207/002 (2013.01); G11C 2207/005 (2013.01); G11C 2207/12 (2013.01);
Abstract

There is provided a memory unit (). The memory unit comprises a plurality of memory cells (), each memory cell of the plurality of memory cells being operatively connected to data input and output circuitry by a pair of bit lines (), a pre-charge circuit () configured to provide a voltage for charging the bit lines, and a multiplexer circuit. The multiplayer circuit () comprises, for each bit line, an associated NMOS () device that is configured to selectively connect the bit line () to the data input and output circuitry and to the pre-charge circuit () when activated by a corresponding bit line selection signal, and a multiplex controller () that is configured to be able to select each pair of bit lines by activating the associated NMOS devices () using the corresponding bit lines selection signals.


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