The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Oct. 12, 2017
Applicant:

The Regents of the University of Michigan, Ann Arbor, MI (US);

Inventors:

John Kloosterman, Ann Arbor, MI (US);

Jonathan Beaumont, Ann Arbor, MI (US);

Davoud Anoushe Jamshidi, Ann Arbor, MI (US);

Jonathan Bailey, Ann Arbor, MI (US);

Trevor Mudge, Ann Arbor, MI (US);

Scott Mahlke, Ann Arbor, MI (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/50 (2006.01); G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4881 (2013.01); G06F 9/462 (2013.01); G06F 9/5016 (2013.01);
Abstract

A technique is provided for processing thread groups, each thread group having associated program code comprising a plurality of regions that each require access to an associated plurality of registers providing operand values for the instructions of that region. Capacity management circuitry is arranged, for a thread group having a region of the associated program code that is ready to be executed, to perform an operand setup process to reserve sufficient storage elements within an operand staging unit to provide the associated plurality of registers, and to cause the operand value for any input register to be preloaded into a reserved storage element allocated for that input register, an input register being a register whose operand value is required before the region can be executed. Scheduling circuitry selects for processing a thread group for which the operand setup process has been performed in respect of the region to be executed.


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